1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating such a semiconductor device, and more particularly to a static induction (SI) thyristor and a method of fabricating such a static induction thyristor.
2. Description of the Related Art
FIGS. 26 and 27 of the accompanying drawings show in fragmentary sectional cross section a conventional static induction thyristor and a process of fabricating the static induction thyristor.
The conventional static induction thyristor, generally denoted at 100, is fabricated as follows:
First, as shown in FIG. 26, N.sup.- substrates 10, 20 having respective mirror-finished surfaces to be joined to each other are prepared.
Then, a P.sup.+ layer 12 is formed on the lower surface of the N.sup.- substrate 10 by diffusing an impurity therein. Recesses 40 for accommodating gate electrodes 90 therein are formed in the upper mirror-finished surface of the N.sup.- substrate 10 by photolithography. Thereafter, a P-type impurity is selectively diffused to form N.sup.+ gate regions 130 selectively in respective bottoms 44 of the recesses 40. Then, gate electrodes 90 of tungsten are formed selectively on the P.sup.+ gate regions 130 in the respective recesses 40 by photolithography.
An N.sup.+ layer 22 is formed on the upper surface of the N.sup.- substrate 20 by diffusing an impurity therein.
Then, the N.sup.- substrates 10, 20 are ultrasonically cleaned in an aqueous solution of sulfuric acid and hydrogen peroxide to remove organic materials and metals therefrom.
The N.sup.- substrates 10, 20 are thereafter cleaned by pure water, and then dried by a spinner at room temperature.
Then, as shown in FIG. 27, while lands 14 between the recesses 40 in the upper surface of the N.sup.- substrate 10 are being held against a lower mirror-finished surface 24 of the N.sup.- substrate 20, the N.sup.- substrates 10, 20 are joined to each other by heating them in a hydrogen atmosphere.
Thereafter, an anode electrode 60 and a cathode electrode 70 are formed respectively on the lower surface of the P.sup.+ layer 12 which is formed on the lower surface of the N.sup.- substrate 10 and the upper surface of the N.sup.+ layer 22 which is formed on the upper surface of the N.sup.- substrate 20.
In the static induction thyristor 100 thus fabricated, the P.sup.+ layer 12 functions as an anode, the N.sup.+ layer 22 as a cathode, the N.sup.- substrates 10, 20 as an N base 50, and the N.sup.+ gate regions 130 and the gate electrodes 90 as a gate for controlling an anode current flowing between the anode electrode 60 and the cathode electrode 70.
Because the N base 50 in which the P.sup.+ gate regions 130 are embedded is produced by joining the N.sup.- substrates 10, 20, the N base 50 has uniform, high-quality crystallinity. The conductivity type of the N base 50 between the P.sup.+ gate regions 130 does not change into a P type which would otherwise be caused if an N.sup.- layer were deposited by epitaxial growth after the formation of the P.sup.+ gate regions 130, making it impossible to control an anode current.
Since the gate electrodes 90 of tungsten are disposed on the P.sup.+ gate regions 130, the lateral resistance of the gate is reduced, increasing a maximum cutoff current. The gate electrodes 90 are accommodated in the recesses 40 in the N.sup.- substrate 10 before the N.sup.- substrates 10, 20 are joined to each other. Consequently, it is not necessary to form grooves of a large aspect ratio in the N.sup.+ layer 22 and the N.sup.- substrate 20 and then form the gate electrodes 90 in such grooves, and the N.sup.+ layer 22 and the N.sup.- substrate 20 would not be divided by such grooves into small strips which would impose a high resistance.
The formation of the recesses 40 in the upper surface of the N.sup.- substrate 10 is not time-consuming because the recesses 40 only need to be capable of holding the gate electrodes 90 therein.
As the gate electrodes 90 are accommodated in the recesses 40 defined in the upper surface of the N.sup.- substrate 10, no recesses are required to be formed in the lower surface 24 of the N.sup.- substrate 20 which is to be joined by the lands 14 on the upper surface of the N.sup.- substrate 10, and hence the lower surface 24 may remain flatwise. Since no special alignment is necessary to join the lands 14 on the upper surface of the N.sup.- substrate 10 to the lower surface 24 of the N.sup.- substrate 20, it is easy to fabricate the static induction thyristor 100.
Publications which disclose semiconductor devices of interest are as follows:
&lt;Patent publications&gt;
Japanese patent No. 1131903; and
Japanese patent publication No. 1-26187. &lt;General publications&gt;
J. Nishizawa "Development of high-power static induction transistors", Report on a research project funded by a subsidy granted for commissioned research by the Agency of Industrial Science and Technology in the Ministry of International Trade and Industry, 1969;
J. Nishizawa "High-power vertical joint FET with triode characteristics", Nikkei Electronics, pages 50.about.61, Sep. 27, 1971;
J. Nishizawa, T. Terasaki, and J. Shibata "Field-Effect Transistor versus Analog Transistor (Static Inductial Transistor)", IEEE Trans. on Electron Devices, Vol. ED-22(4), 185 (1975);
J. Nishizawa and K. Nakamura, Rev. de Physiquee Appliquee, T13, 725 (1978);
J. Nishizawa and Y. Otsubo, Tech. Dig. 1980 IEDM, 658 (1980); and
J. Nishizawa, T. Ohmi, M. Sha, and K. Kitani, Technical Research Report, Electronics Communications Society, ED81-84 (1981).
As described above, the static induction thyristor 100 and the process of fabricating the static induction thyristor 100 are highly advantageous. In the conventional static induction thyristor 100, however, the P.sup.+ gate regions 130 are disposed only in the bottoms 44 of the recesses 40. Therefore, the thickness of depletion layers extending from the P.sup.+ gate regions 130 in the direction of an anode current at the time the static induction thyristor 100 is turned off is small, posing problems with respect to dielectric strength and leakage current.
Since the thickness of depletion layers extending from the P.sup.+ gate regions 130 in the direction of an anode current at the time the static induction thyristor 100 is turned off is small, it is necessary to reduce the distance between the P.sup.+ gate regions 130 in order to attain desired turn-off characteristics, and hence it is necessary to reduce the distance between the recesses 40. Consequently, a product yield is low when the recesses 40 are formed in a fine pattern in the upper surface of the N.sup.- substrate 10.
Reducing the distance between the recesses 40 results in a reduction in the cross-sectional area of the N.sup.- substrate 10 between the recesses 40 and an increase in the electric resistance thereof. As a result, a turn-on voltage is increased, and a large current cannot flow.